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October 24, 2026

China's Chipmakers Can Work Around EUV Ban, but Costs Climb with Every Extra Exposure

Experts say multiple patterning on older DUV machines lets China produce advanced chips without EUV, but at the price of higher costs, lower yields and a ceiling on how far it can go.

By News Media House Staff ·

Export controls have kept ASML's most advanced extreme ultraviolet (EUV) lithography machines out of China, leaving the country's chipmakers dependent on older deep ultraviolet (DUV) equipment. By exposing critical chip layers several times, those machines can still turn out capable silicon. The approach, however, brings more opportunities for defects, longer production times and bigger bills, according to experts who spoke to Tom's Hardware.

EUV has long been viewed as the biggest bottleneck in China's push for cutting-edge chips. ASML is the only maker of the machines, which use 13.5nm-wavelength light to print some of the finest features on modern processors. Some analysts put the EUV gap between China and the West at five years or more.

Even so, China has gone further than might be expected. A 2023 teardown of Huawei's Mate 60 Pro found its Kirin 9000S processor was made by SMIC using a second-generation 7nm-class process without EUV. More recent analysis of the Kirin 9030 indicated SMIC had moved its DUV-based process closer to the density associated with 5nm manufacturing, though it still trails the leading processes from TSMC and Samsung.

The technique behind this progress is multiple patterning: instead of printing an intricate layer in one pass, manufacturers split the design into several simpler patterns and build up the intended layer step by step. Chris Mack, co-founder and CTO of semiconductor firm Fractilia, said the question of whether a chip can be made without EUV ignores the trade-offs involved. He noted that industry wisdom held that three exposures on a 193 immersion tool cost about the same as one EUV exposure, but that at four masks EUV became the cheaper option.

Quality is also at stake. Each new pattern must align precisely with what has already been etched, so more exposures mean more accumulated overlay errors and process variation. Designers can add space around features to compensate, but that enlarges the chip and reduces the number of dies per wafer, a costly outcome when wafers cost tens of thousands of dollars each. "You don't sell wafers, you sell die," Mack said.

Memory offers some evidence of the efficiency gap. In a June report, Morgan Stanley estimated Chinese DRAM maker CXMT produces only about one-third as many bits per wafer as Western rivals, and called lithography access a "hard ceiling" for Chinese memory development. Mack also cautioned that process "node" labels such as 5nm or 3nm have almost no meaning on their own, and SMIC's N+3 process, while progress, remains significantly less scaled than established 5nm processes from Samsung and TSMC.

DUV still has room to run. Micron developed its 1-alpha DRAM without EUV, using multiple patterning and tight process control, and Mack said it "pushed 193 farther than any of the other memory makers did." Morgan Stanley considers CXMT's planned move to 1-alpha DRAM, intended for HBM3e, achievable without EUV. Copenhagen Business School researcher Douglas Fuller expects advanced packaging to let firms use DUV for the latest DRAM generations by the end of the decade. Mack added that China could go a long way if it had the full 193 immersion ecosystem and designed products around it, though he stressed that memory is much easier than logic.

Even Micron eventually turned to EUV for its 1-gamma DRAM, which it says delivers more than 30% greater bit density per wafer than the previous 1-beta generation. EUV has its own drawbacks, including stochastic effects that can be countered with higher exposure doses, at greater cost. Still, Mack said he would be "hard pressed" to believe a 3nm or 2nm node could be economically viable without EUV.

That does not mean Chinese chipmakers will stall. They can keep pushing DUV while accepting larger dies, poorer yields, longer manufacturing times or a mix of the three, and they can add capacity. Morgan Stanley assumes CXMT stays on 1-alpha without EUV yet still lifts its share of global DRAM bit supply from 14% in 2026 to 16% in 2028 through new greenfield capacity. The bank also expects China's AI chip self-sufficiency to rise from 42% in 2025 to 70% by 2030, while EUV, HBM and advanced software leave a persistent gap.

Source: Tom's Hardware

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